... posed in the production process. The Dilemma is obvious: The days of the first “printed circuits” which could be checked simply with the naked | MULTILAYER CIRCUITS PROTOTYPE | eye are over. Today, high-tech equipment is necessary for a thorough PCB test. Optical checks with the aid of conventional micro-scopic equipment are sufficient for | MULTILAYER CIRCUITS PROTOTYPE | one sided and relatively simple double-sided PCBs. Residues, constricted conductors and subcorrosions can be discovered which would otherwise lead to PCB failure after a number | MULTILAYER CIRCUITS PROTOTYPE | of operational hours. An electrical test is needed to check the actual functions of a PCB. It is an essential if inner layers need to | MULTILAYER CIRCUITS PROTOTYPE | be tested, as is the case with multi-layers. In two position measure-ments all connections in the PCB are checked for stoppages and short circuits. All | MULTILAYER CIRCUITS PROTOTYPE | SMD pads and plated through holes are checked. The electrical test can be conducted as a parallel or finger test. Parallel test: For the parallel | MULTILAYER CIRCUITS PROTOTYPE | test a control adaptor is constructed, consisting, e.g. of several synthetic ...
[ Multilayer Circuits Prototype ]


... Technical limit µ Silk screen to Pads spacing 300 250 200 Silk screen to PTH spacing 300 250 200 Line width 200 175 140 | MULTILAYER CIRCUITS PROTOTYPE | Minimum size of letters 1250 1000 800 Carbon key pad printing Standard (µ) Special (µ) Technical limit (µ) Track to track spacing 500 400 400 | MULTILAYER CIRCUITS PROTOTYPE | Minimum track width 500 400 300 Peelable mask Standard Special Technical limit Max diameter of covered holes 1,8 mm 2,0 mm 2,6*mm Thickness of peelable | MULTILAYER CIRCUITS PROTOTYPE | mask 300µ 400µ 500µ *coverage cannot be guaranteed 5.9 Contour machining Contouring is performed by three possible techniques: * Routing * V-cutting These techniques allow | MULTILAYER CIRCUITS PROTOTYPE | contouring within the standard „DIN 7168 mittel“ (medium accuracy) and „fein“ (precise accuracy). Dependant on the size of the board following tolerances are given: Board | MULTILAYER CIRCUITS PROTOTYPE | size: fine middle 0,5 mm up to 6 mm +/- 0,05 mm +/- 0,10 mm 6 mm up to 30 mm +/- 0,10 mm +/- | MULTILAYER CIRCUITS PROTOTYPE | 0,20 mm 30 mm up to 120 mm +/- 0,15 mm +/ 0,30 mm 120 mm up to 400 mm +/- 0,20 mm +/- 0,50 | MULTILAYER CIRCUITS PROTOTYPE | mm 400 mm up to 1000 mm +/- 0,30 mm +/- 0,80 mm 1000 ...
[ Multilayer Circuits Prototype ]


... in the further course of processing management. Lead-free solderings also have serious disadvantages, as hot air tin surfacing exposes the multi-layers to higher processing | MULTILAYER CIRCUITS PROTOTYPE | temperatures and copper leaching effects. would briefly like to explain why chemical silver is the lead-free procedure of the future, and why it will be | MULTILAYER CIRCUITS PROTOTYPE | the focus of our future investments in the field of surface refinement: UNPROBLEMATIC WASTE WATER PROCESSING Similarly to chemical tin surfacing, it is a non-electrical, | MULTILAYER CIRCUITS PROTOTYPE | auto-catalytic procedure based on the contrasting electro-negativity of copper and the more “precious” silver. The advantages of this processing manner compared with chemical tin are | MULTILAYER CIRCUITS PROTOTYPE | fewer processing steps and lower rinsing temperatures (30 – 50 C°). From the printed circuit board manufacturer’s viewpoint, one strong point in favour of the | MULTILAYER CIRCUITS PROTOTYPE | silver procedure is the fact that waste water processing is unproblematic, whereas Imm Ag has had problems with toxic gold chemistry and chemical tin due | MULTILAYER CIRCUITS PROTOTYPE | to ...
[ Multilayer Circuits Prototype ]